Electronic Design

eGaN® FET-Silicon Power Shoot-Out Vol. 13, Part 2: Optimal PCB Layout

With the significant reduction in package parasitics provided by the eGaN FET, the package inductance is minimized and is no longer the major parasitic loss contributor. The high frequency loop ...
EDN

Reducing PDN impedance at high frequencies

This paper discusses the importance of low PDN (power-distribution network) impedance on high-speed PCBs, and the ways to achieve lower impedance at high frequencies. The study is conducted with ...
Nature

EMI characteristics analysis and suppression technique of magnetic near-field coupling in power delivery adapter

With the continuous improvement of the power density of the power delivery (PD) adapter, switching frequency increases and volume decreases. The EMI issues caused by magnetic near-field coupling ...
Electronic Design

Best Practices, Part 1: Integrating eGaN FETs

1. Synchronous buck converter with parasitic inductances. It has been previously demonstrated that the chip-scale packaging of high-voltage lateral eGaN FETs have extraordinarily small parasitic ...